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 EM92600/1A EM92600/1A
DUAL PLL FOR MHZ CORDLESS PHONE DUAL PLL FOR 46/49 46/49 MHZ CORDLESS PHONE
GENERAL DESCRIPTION
The EM92600/1A series are developed for 46/49 MHz of 10 channels band frequency of cordless telephone which is used in U.S.A.. These devices are dual phase-locked loop frequency synthesizers contained ROM counters for receive and transmit loops with two independent phase detect circuits. A common reference oscillator and reference divider are share by the receive and transmit circuits. Other features include a lock detect circuit for the transmit loop, illegal code default, a buffered oscillator output for mixing purposes in the system, 5KHz tone output . The EM92601A is designed for easy MPU interface. It provides the same features as the EM92600A , but accepts channel programming via a clocked, serial input instead of parallel BCD inputs. The EM92600A is selected channels via machanical switches of parallel BCD input.
FEATURES
* * * * * * * * Include oscillation circuit with external X-TAL (10.240 MHz). Unlock detector. 5KHz output for guard tone. Standby mode for power saving. 2.5 to 5.5V supply range. Baseset/Handset changeable. Available in 16 pin DIP or SOP. SERIES Part Number Package Channel Selection EM92600AP DIP parallel EM92600AM SOP parallel EM92601AP DIP serial EM92601AM SOP serial
PIN ASSIGNMENTS
EM92600A
XTALO MODE SB 5K D0 D1 D2 D3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 XTALI VDD RIF PDR VSS PDT LD TIF XTALO MODE SB 5K DI CLK NC EN
EM92601A
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 XTALI VDD RIF PDR VSS PDT LD TIF
* This specification are subject to be changed without notice.
4.23.1995
1
EM92600/1A
DUAL PLL FOR 46/49 MHZ CORDLESS PHONE
FUNCTIONAL BLOCK DIAGRAM
XTAL0 VDD VSS VDD XTAL1 VDD LD PDT Lock detector phase detector Phase detector PDR Reference counter divide by 2048 5K
TIF
14 bits divide by N Transmit counter
b13-b0
14 bits divide by N receive counter
b27-b14
RIF
ROM 32*28 & decoder logic
SB
D3 D2 D1 D0 MODE
EM92600A block diagram
XTAL0 VDD VSS VDD XTAL1 VDD LD PDT Lock detector phase detector Phase detector PDR Reference counter divide by 2048 5K
TIF
14 bits divide by N Transmit counter
b13-b0
14 bits divide by N receive counter
b27-b14
RIF
ROM 32*28 & decoder logic
4 bits latch
4 bits S/R
SB MODE
EN
CLK DI
EM92601A block diagram
PIN DESCRIPTIONS
Symbol XTALO MODE SB Pin No. O I I Function This ouput generates reference frequency when it is connected to pin 16 with external OSC of which frequency is 10.240MHz Base/remote changing. Internal pull down. VDD=base,VSS=remote. The standby pin is uses to save power when no transmit. Internal pull down. High: transmit and receive active Low: receive acts only The signal derived from the reference oscillator. 5KHz output. 4.23.1995
2
5K
O
* This specification are subject to be changed without notice.
EM92600/1A
DUAL PLL FOR 46/49 MHZ CORDLESS PHONE
Symbol D0 D1 D2 D3 Di CLK NC EN TIF LD PDT VSS PDR RIF VDD XTAL1
I/O I I I I I I I I O O O I I
Function The channel selected pin. LSB.(intenal pull down) The channel selected pin. (internal pull down) The channel selected pin. (internal pull down) The channel selected pin. MSB.(internal pull down) The serial input data pin. Clock input. Each low to high transition of the clock shifts one bit of data into the on-chip shift register. Not connect. The enable pin controls the data transfer from the shift register to the 4-bit latch. A low to high transition latches the data. Input to programmable divider of Tx. AC coupling with VCO. Min input voltage is 200mVpp. Unlock detector output. VDD level: unlock. Phase detector output for Tx. PDT detects the phase error from Tx PLL and its output is connected to external low pass filter. Ground. Phase detector output for Rx. PDR detects the phase error from Rx PLL and its output is connected to external low pass filter. Input of programmable divider for Rx.AC coupling with VCO. Min input voltage is 200mVpp. Power supply. To connect crystal ( 10.240MHz ) and capacitor.
ABSOLUTE MAXIMUM RATINGS
Symbol VDD VIN IIN,IOUT IDD,ISS TA TSTG Rating DC supply voltage Input voltage DC current drain per pin DC current drain VDD or VSS pins Operating temperature range Storage temperature range Value -0.5 to +6 -0.5 to VDD+0.5 10.0 30.0 -30 to +75 -65 to +150 Unit V V mA mA C C
* This specification are subject to be changed without notice.
4.23.1995
3
EM92600/1A
DUAL PLL FOR 46/49 MHZ CORDLESS PHONE
DC ELECTRICAL CHARACTERISTICS
(TA= 25C unless otherwise noted ) Parameter Operating voltage Input voltage Output voltage Input low current Sym. VDD VIL VIH VOL VOH IIL IIH IOH IOL IDS IDO IOZ -0.2 0.2 36 120 mA 1.5 3.0 1 mA mA A Min. 2.5 2.2 2.95 -36 -0.06 Input high current Typ. Max. 5.5 0.8 0.05 Unit V V V A A VDD=3V VDD=3V vIL=0 pin 16,14,9 pin 2~8 vIH=V DD-0.5V pin 16,14,9 pin 2~8 VOH=2.6V VOL=0.4V VDD=3V, note1 VDD=3V, note2 VDD=5V Condition
Output current Standby current Operating current (0.2Vp-p input at RIF,TIF) 3-state leakage current
Note 1: XTALin: 10.24MHz ; MODE:VDD; SB:VSS; TIF=20MHz(200 mVp-p); RIF=40MHz(200 mVp-p); others are open. Note 2: XTALin: 10.24MHz ; MODE:VDD; SB:VDD; TIF=20MHz(200 mVp-p); RIF=40MHz(200 mVp-p); others are open.
AC ELECTRICAL CHARACTERISTICS
Parameter Output rise time Output fall time Input rise and fall time OSC in Maximum frequency input =sine wave 0.2Vp-p Setup time data to clock Enable to clock Hold time clock to data Recovery time Enable to clock Input pulse width clock and Enable Sym. TR TF TR TF FMAX Min. Typ. Max. 200 200 5 12 50 50 100 200 80 80 80 Unit nS nS S Condition VDD=3V VDD=3V XTAL1 VDD=3V XTAL1 RIF (VDD=3V) TIF EM92601A only
MHz
TSU nS nS nS nS
TH TREC TW
EM92601A only EM92601A only EM92601A only
* This specification are subject to be changed without notice.
4.23.1995
4
EM92600/1A
DUAL PLL FOR 46/49 MHZ CORDLESS PHONE
TIMING DIAGRAM
Data
D3 tw tsu
D2 th
2 nd CLK
D1
D0
Clock
1 st CLK
3 rd CLK
4 th CLK
tw trec
1 st CLK
tsu Enable
Previous Data Latched
EM92601A Timing
1.6S
PDT
6.40.4mS
LD
Unlock Timing
APPLICATION CIRCUIT
0.455MHz 2ND IF
2ND MIX
1ST IF
1ST MIX
BPF
RX VCO
LPF
LPF
TX VCO
BPF
16
XTAL1
15
VDD
14
RIF
13
PDR
12
VSS
11
PDT
10
LD D2/NC
9
TIF
D1/CLK
XTAL0
MODE
SB
1
2
3
4
5K
10.240 MHz
5
6
7
8
* This specification are subject to be changed without notice.
D3/EN
DO/DI
4.23.1995
5
EM92600/1A
DUAL PLL FOR 46/49 MHZ CORDLESS PHONE
DIVIDE RATIO AND VCO FREQUENCIES Base
(MODE=1) D3 D2 D1 D0
Input CH
Rx (Fref=5KHz)
FRx (MHz) FVCO(MHz) N
Tx=(Fref=5KHz)
FTx(MHz) FVCO(MHz) N
0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0
0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0
0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 2 3 4 5 6 7 8 9 10
49.670 49.845 49.860 49.770 49.875 49.830 49.890 49.930 49.990 49.770 49.970 49.970 49.970 49.970 49.970 49.970
38.975 39.150 39.165 39.075 39.180 39.135 39.195 39.235 39.295 39.275 39.275 39.275 39.275 39.275 39.275 39.275
7795 7830 7833 7815 7836 7827 7839 7847 7859 7855 7855 7855 7855 7855 7855 7855
46.610 46.630 46.670 46.710 46.730 46.770 46.830 46.870 46.930 46.970 46.970 46.970 46.970 46.970 46.970 46.970
46.610 46.630 46.670 46.710 46.730 46.770 46.830 46.870 46.930 46.970 46.970 46.970 46.970 46.970 46.970 46.970
9322 9326 9334 9342 9346 9354 9366 9374 9386 9394 9394 9394 9394 9394 9394 9394
REMOTE
(MODE=0) D3
Input CH
D2 D1 D0
Rx (Fref=5KHz)
FRx (MHz) FVCO(MHz) N
Tx=(Fref=5KHz)
FTx(MHz) FVCO(MHz) N
0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0
0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0
0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 2 3 4 5 6 7 8 9 10
46.610 46.630 46.670 46.710 46.730 46.770 46.830 46.870 46.930 46.970 46.970 46.970 46.970 46.970 46.970 46.970
35.915 35.935 35.975 36.015 36.035 36.075 36.135 36.175 36.235 36.275 36.275 36.275 36.275 36.275 36.275 36.275
7183 7187 7195 7203 7207 7215 7227 7235 7247 7255 7255 7255 7255 7255 7255 7255
49.670 49.845 49.860 49.770 49.875 49.830 49.890 49.930 49.990 49.970 49.970 49.970 49.970 49.970 49.970 49.970
49.670 49.845 49.860 49.770 49.875 49.830 49.890 49.930 49.990 49.970 49.970 49.970 49.970 49.970 49.970 49.970
9934 9969 9972 9954 9975 9966 9978 9986 9998 9994 9994 9994 9994 9994 9994 9994
* This specification are subject to be changed without notice.
4.23.1995
6


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